EE Student Christos Vezyrtzis Wins Best Paper Award

Electrical engineering Ph.D. student Christos Vezyrtzis has won the Best Paper Award in the Logic and Circuit Design track at the 30th Institute of Electrical and Electronics Engineers (IEEE) International Conference on Computer Design.

 

The paper, “Designing Pipelined Delay Lines with Dynamically-Adaptive Granularity for Low-Energy Applications,” presents work led by Vezyrtzis for his dissertation on adaptive digital signal processors (DSP's). His co-advisors are Steven Nowick, professor of computer science and chair of the Computer Engineering Program, and Yannis Tsividis, Charles Batchelor Professor of Electrical Engineering.

 

“Winning was validation for the hard work that we put into this, as well as a big confidence boost,” Vezyrtzis says. “It was also an honor that I had the chance to represent my advisors, department, and school in such a prestigious manner.”

 

Vezyrtzis is researching a novel approach to significantly reducing energy in delay lines, which are components that indicate precise system timing without the need for a digital clock.

 

“By eliminating the clock,” he explains, “these systems only work when needed and thereby save energy. This makes them a good candidate for many new circuit applications that need to run with very low power consumption. We are working on one such application, called a continuous-time DSP, a new digital signal processor with low-energy operation and low distortion.”

 

Vezyrtzis actually came up with this idea while trying to design a digital signal processor chip.

 

“In the framework of thinking out of the box, and trying out things that are interesting,” he says, “we thought of optimizing this delay line by making it dynamically adapt to its actual input sample stream, thereby improving its energy efficiency.”

— by Jeff Ballinger